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SNR impact of binning in CMOS cameras - Printable Version

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SNR impact of binning in CMOS cameras - dts350z - 2018-11-30

Cooled CMOS cameras are becoming very popular due to low (er than CCD) cost and low readout noise.

However when it comes to the impact of binning on SNR I gather the math is different for CMOS vs. CCD and may be further nuanced by Drivers doing hardware vs. software binning (with some settings also affecting camera bit depth).

I include two links discussing this. First a general discussion from a astronomical CMOS camera manufacturer:


https://www.atik-cameras.com/news/binnning-the-differences-between-cmos-and-ccd/

and draw your attention to these paragraphs:


Quote:CMOS technology is different in that the pixels cannot be combined into a super pixel before they are read out. What we can do is combine the pixels mathematically after readout on the computer. Each super pixel again receives the signal values from its previous individual pixels, but because this is happening after the pixels have been read out, there  is also an increase in read noise. However, the read noise increases at a lesser rate than the signal, giving us an improved SNR. Let’s take a look at some of the maths behind it.

Staying with the above example, the signal is again 4x3e-=12e-.  However the individual pixels have already been digitised and each have 3e- read noise. As previously mentioned, noise in an image doesn’t accumulate as a normal addition but follows a statistical distribution as the square root of the number of pixels added. So in this case the noise of our CMOS super pixel, this is 3e-x4/sqr4=6e-. So now our SNR is 12/6=2, twice as good as without binning but not as good as with CCD technology. As the amount of binning increases, 3×3, 4×4 etc, the difference between signal to noise performance in CCD and CMOS also increases.


However that seems to differ a little from some of the discussion of my particular camera of interest here:

https://www.cloudynights.com/topic/551925-asi1600-to-bin-or-nah/#entry7461288

Specifically:



Quote:The "hardware" binning on the ASI1600 is actually done post-ADC. It is done in hardware, however from an SNR standpoint there is no benefit. Not that pre-ADC binning in charge or voltage domain would really lessen read noise all that much...it is already so low, the reduction with true hardware binning would not seem as great as with a camera that had 9e- read noise.

However, there is one thing about hardware binning with the ASI1600...it forces 10-bit readout. This is not something ZWO chose to do...it is a trait of the sensor itself. While hardware binning can certainly let you get faster frame rates (up to 400fps with smaller ROI), the loss in bit depth can cost you fine details, as you end up getting even greater quantization. The driver supports software binning, which is just the same as post-process downsampling, with the small added benefit that your original files will be smaller, use less space, and will pre-process faster.

So, generally speaking, there is not a lot of real-world benefit to using binning while you are imaging. The biggest benefit for DSO imaging might be less disk space used and faster preprocessing.  

emphasis mine. That's just one post in a thread of a couple of pages however that is the one statement I want to understand relative to how ST4 treats (or should treat) these cooled cmos cameras and binning.

With the ASI1600 entered as a CCD camera, ST4 is telling me  68x10 min exposures to reach 50 SNR at bin 1, only 16x10 min exposures at bin 2. 

Changing nothing else except marking the camera as Video/WebCam I still get 68x10min for bin 1 and 6x10 min exposures at bin 2.

That doesn't seem to agree with either of the opinions expressed in the links above, So I'm wondering if it is correct or not?

Thanks and I apologize for posting about this in multiple places, but I wanted to do a full post on just this one question, before moving back to what settings I'm using leading to what questions I have in ST4.

Bin 1:

[Image: ECBin1.png]
Bin 2:

[Image: ECBin2.png]


RE: SNR impact of binning in CMOS cameras - theskyhound - 2018-12-01

Hello,

Thank you for bringing this issue to my attention. I was not aware that there may be a difference in the way that binning is done in CMOS cameras. I will look into the issue and do testing with CMOS cameras to verify that the calculations are accurate.


RE: SNR impact of binning in CMOS cameras - edwardmartin755 - 2018-12-20

The post is really very helpful as I have got to know many important tips from your side. And the issue you have specified can be corrected also.


RE: SNR impact of binning in CMOS cameras - ehorton - 2019-09-24

(2018-12-01, 06:50 AM)theskyhound Wrote: Hello,

Thank you for bringing this issue to my attention. I was not aware that there may be a difference in the way that binning is done in CMOS cameras. I will look into the issue and do testing with CMOS cameras to verify that the calculations are accurate.
I know you probably have a lot on your plate but was wondering if you were ever able to do additional testing to validate cmos.  I have a ASI294mc Pro and very anxious to know if the data is correct.

Thanks
Eric


RE: SNR impact of binning in CMOS cameras - theskyhound - 2019-09-24

Hello,

So far my testing has shown that there is ittle difference between the CCD binning calculation and the results of using a CMOS camera. So as a preliminary result I can say that if some changes are required for CMOS cameras they will likely only have a minor effect. I do want to keep looking into this, however, and have plans for a more accurate test in a few months. I'll post the result here.